19.6.5 CRC Status

This bit is cleared when a new CRC source is selected.

This bit is set when the CRC generation is complete and the CRC Checksum is ‘0’.

When running CRC-32 and appending the checksum at the end of the packet (as little endian), the final checksum will be 0x2144df1c. However, if the checksum is complemented before it is appended (as little endian) to the data, the final result in the checksum register will be zero. See the description of CRCCHKSUM to read out different versions of the checksum.

This bit is cleared by writing a ‘0’ to it when used with the I/O interface. When used with a DMA channel, the bit is set when the corresponding DMA channel is enabled, and cleared when the corresponding DMA channel is disabled. This bit cannot be written to while the CRC is used with a DMA channel.

This bit is set when a source configuration is selected in CRCSRC and as long as the source is using the CRC engine.