1.4.4.2 Conversion from PCIe Read to AXI Read Transactions

A single PCIe read transaction is converted into multiple AXI read transactions when the bridge complies with the following two constraints:

• When the PCIe read transaction targets AXI address space that crosses the negotiated maximum payload boundary, the fabric logic may still return with one single AXI burst transaction. In this case, the PCIe bridge breaks it into multiple separate PCIe read completions with AXI read data broken at the negotiated maximum payload boundary in AXI address space.

Read requests, which cross the address boundaries at integer multiples of RCB bytes may be completed using more than one completion, but the data must not be fragmented except along the following:

• The first completion starts with the address specified in the request, and ends at one of the following:
  • The address specified in the request plus the length specified by the request, that is, the entire request.
  • An address boundary between the start and end of the request at an integer multiple of RCB bytes.
• The final completion ends with the address specified in the request plus the length specified by the request.
• All completions between, but no including, the first and final completions will be an integer multiple of RCB bytes in length.

The following are the examples of AXI split transactions:

• Assume the negotiated maximum payload size is 256 Bytes. Memory read request with address of 0x10000 and length of 192 bytes can be completed by a root complex with a RCB value of 64 Bytes with one of the following combination of completions (bytes):
  • 192
  • 128, 64
  • 64, 128
  • 64, 64, 64
• Assume the negotiated maximum payload size is 256 Bytes. Memory read request with address of 0x10200h and length of 256 bytes can be completed by an Endpoint in one of the following combination of completions (bytes):
  • 256
  • 96, 160
  • 96, 128, 32
  • 224, 32