1.3.2.1.1 MIV_RV32_C0
(Ask a Question)The MIV_RV32_C0 (MIV_RV32_C0) is configured with a Reset Vector Address of 0x80000000. After reset, the processor starts executing the instructions from this address. The main memory of the processor address ranges from 0x80000000 to 0x8FFFFFFF.
The AXI_Interconnect_0 and MIV_ESS_C0 block connects the MIV_RV32_C0 block to:
- The PF_PCIE_0 block through PCIe_APB slave interface. The MIV_RV32_C0 block accesses the PCIe control registers through the PCIe_APB slave interface.
- The PF_PCIE_0 block through PCIe_AXI slave interface.
- The MIV_ESS_C0 UART block through a APB slave interface.
These slaves are connected at the following addresses:
- PCIe_APB slave: 0x63000000
- PCIe_AXI: 0x70000000
- MIV_ESS_C0 UART_ APB slave: 0x61000000