20.18.38 PMC PLL Interrupt Disable Register

This register can only be written if the WPITEN bit is cleared in the PMC Write Protection Mode Register.

Name:	PMC_PLL_IDR
Offset:	0x00E8
Reset:	–
Property:	Write-only


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
						UNLOCK2	UNLOCK1	UNLOCK0
Access						W	W	W
Reset						–	–	–


Bit	15	14	13	12	11	10	9	8

Access
Reset


Bit	7	6	5	4	3	2	1	0
						LOCK2	LOCK1	LOCK0
Access						W	W	W
Reset						–	–	–

Bits 16, 17, 18 – UNLOCKx PLL of Index x Unlock Interrupt Disable

Bits 0, 1, 2 – LOCKx PLL of Index x Lock Interrupt Disable

DS60001779C

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