60.7.15 SECUMOD RAM Access Rights Status Register
The following configuration values are valid for all listed bit names of this register:
0: No access violation occurred
1: Write access violation occurred
2: Read access violation occurred
3: Read and write access violation occurred
Writing any value to this register resets the register and the associated interrupt line (SECURAM ID).
| Name: | SECUMOD_RAMACCSR |
| Offset: | 0x0080 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| RW5[1:0] | RW4[1:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RW3[1:0] | RW2[1:0] | RW1[1:0] | RW0[1:0] | ||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |