65.14.48 SDMMC Debounce Register
Name: | SDMMC_DEBR |
Offset: | 0x207 |
Reset: | 0x00 |
Property: | Read/Write |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CDDVAL[1:0] | |||||||||
Access | R/W | R/W | |||||||
Reset | 0 | 0 |
Bits 1:0 – CDDVAL[1:0] Card Detect Debounce Value
Defines the debounce delay for card insertion/removal.
CDDVAL | Number of Slow Clock Cycles N |
---|---|
0 | 1 |
1 | 8 |
2 | 33 |
3 | 328 |