50.6.15 ASRC Write Protection Mode Register
Name: | ASRC_WPMR |
Offset: | 0xE4 |
Reset: | 0x00000000 |
Property: | Read/Write |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
WPKEY[23:16] | |||||||||
Access | W | W | W | W | W | W | W | W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
WPKEY[15:8] | |||||||||
Access | W | W | W | W | W | W | W | W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
WPKEY[7:0] | |||||||||
Access | W | W | W | W | W | W | W | W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
WPCREN | WPITEN | WPEN | |||||||
Access | R/W | R/W | R/W | ||||||
Reset | 0 | 0 | 0 |
Bits 31:8 – WPKEY[23:0] Write Protection Key
Value | Name | Description |
---|---|---|
0x535243 | PASSWD | Writing any other value in this field aborts the write operation of the WPEN, WPITEN and WPCREN bits. Always read at 0. |
Bit 2 – WPCREN Write Protection Control Register Enable
Value | Description |
---|---|
0 | The write protection of control register is disabled |
1 | The write protection of control register is enabled. Any attempt to modify the control register configuration is cancelled and leads to an error in the ASRC_WPSR register. |
Bit 1 – WPITEN Write Protection Interrupt Enable
Value | Description |
---|---|
0 | The write protection of interrupt registers is disabled |
1 | The write protection of interrupt registers is enabled. Any attempt to modify the interrupt configuration is cancelled and leads to an error in the ASRC_WPSR register. |
Bit 0 – WPEN Write Protection Enable
Value | Description |
---|---|
0 | The write protection is disabled |
1 | The write protection is enabled. All write accesses to configuration registers are canceled and generate an error in the ASRC_WPSR register |