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20.4.7 I2 Cx Receive Data Register
Table 20-8. Register Bit Attribute Legend Symbol Description Symbol Description Symbol Description R Readable
bit HC Cleared by
Hardware (Gray
cell) Unimplemented W Writable
bit HS Set by
Hardware X Bit is unknown
at Reset C Write to
clear S Software
settable bit x Channel
number
Name: I2CxRCV Offset: 0x1898,
0x18E8
Bit 31 30 29 28 27 26 25 24 Access Reset
Bit 23 22 21 20 19 18 17 16 Access Reset
Bit 15 14 13 12 11 10 9 8 Access Reset
Bit 7 6 5 4 3 2 1 0 I2CRXDATA[7:0] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bits 7:0 – I2CRXDATA[7:0]
I2 Cx Receive Data bits
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