20.5.2.7 Building Complete Host Messages

As described in Communicating As a Host In a Single Host Environment, the user software is responsible for constructing messages with the correct message protocol. The module controls individual portions of the I2C message protocol; however, sequencing of the components of the protocol to construct a complete message is performed by the user software.

The user software can use polling or interrupt methods while using the module. The timing diagrams shown in this document use interrupts for detecting various events.

The user software can use the SEN, RSEN, PEN, RCEN and ACKEN bits (Least Significant five bits of the I2CxCON1 register), and the TRSTAT status bit as a ‘state’ flag when progressing through a message. For example, Table 20-20 shows some example state numbers associated with bus states.

Table 20-20. Host Message Protocol States
Example

State Number(1)

I2CxCON[4:0] or I2CxCONL[4:0]TRSTAT

(I2CxSTAT[14])

State
0000000Bus Idle or Wait
100001N/ASending Start Event
2000001Host Transmitting
300010N/ASending Repeated Start Event
400100N/ASending Stop Event
501000N/AHost Reception
610000N/AHost Acknowledgment
Note: The example state numbers are for reference only. The user software can assign the state numbers as desired.

The user software will begin a message by issuing a Start condition. The user software will record the state number corresponding to the Start.

As each event completes and generates an interrupt, the interrupt handler may check the state number. Therefore, for a Start state, the interrupt handler will confirm execution of the start sequence and then start a host transmission event to send the I2C device address, changing the state number to correspond to the host transmission.

On the next interrupt, the interrupt handler will again check the state, determining that a host transmission just completed. The interrupt handler will confirm successful transmission of the data and then move on to the next event, depending on the contents of the message. In this manner, on each interrupt, the interrupt handler will progress through the message protocol until the complete message is sent.

Figure 20-14 provides a detailed examination of the same message sequence as shown in Figure 20-6. Figure 20-15 provides a few simple examples of the messages using a 7-bit addressing format. Figure 20-18 provides an example of a 10-bit addressing format message sending data to a client. Figure 20-19 provides an example of a 10-bit addressing format message receiving data from a client.

Figure 20-14. Host Message (Typical I2C Message: Read of Serial EEPROM)
Figure 20-15. Host Message (7-Bit Address: Transmission and Reception)
Figure 20-16. I2C Host, 7-Bit Address, Read with RXIF without CRC
Figure 20-17. I2C Host, 7-Bit Address, Write with TXIF without CRC
Figure 20-18. Host Message (10-Bit Transmission)
Figure 20-19. Host Message (10-Bit Reception)