20.5.2.2 Host Transmission

User software should configure data packet size in PSZ (I2CxCON2) excluding address byte and PEC, if enabled. The transmission of a data byte, a 7-bit device address byte or the second byte of a 10-bit address is accomplished by writing the appropriate value to the I2CxTRN register. Before transmitting, ND/A (I2CxCON2[18]) has to be cleared/set to indicated address/data transmission. Loading the I2CxTRN register will start the following process:

1. The user software loads the I2CxTRN register with the data/address byte to transmit.
2. Writing to the I2CxTRN register sets the TBF bit (I2CxSTAT1[0]).
3. The data/address byte is shifted out through the SDAx pin until all eight bits are transmitted. Each bit of address or data will be shifted out onto the SDAx pin after the falling edge of SCLx.
4. On the ninth SCLx clock, the module shifts in the ACK bit from the client device and writes its value into the ACKSTAT status bit (I2CxSTAT1[15]).
5. The module generates the I2CxIF interrupt at the end of the ninth SCLx clock cycle if HDTXIE (I2CxINTC[1]) bit and HSTIE (I2CxINTC[13]) are enabled.