10.9.1.1 Bus Error Traps

This trap is generated if the requested operation cannot be completed due to errors on the bus. BMX initiator modules will generate this error if the BMX or target macro report an error during the transaction (e.g., address errors, ECC DED errors). A bus error occurs when any of the bits within the INTCON3 register are set. Each bit within the INTCON3 register is assigned to a specific bus error condition.