29.4.6 Input Offset Trim

It is possible for the user to override factory calibration values and perform user calibration for input referred voltage offset errors. The AMPxCON2 register is used for input offset which allows an adjustment to be added or subtracted from the factory offset trim value. The register allows the user to increase or decrease the offset trim up to the maximum or minimum value of trim.

The Op Amp has provisions for the user to measure and adjust the offset. The offset is measured by connecting the DAC input to the Op Amp input. The OMONEN control bit allow the Op Amp output to be connected to the ADC inputs to do input offset calibration. Note that the user must select the appropriate analog input using the ADC controller and set the OMONEN bit to route these Op Amp signals to the ADC. The OMONEN bit should be set high only for one instance at a time. It is advised to not set the bit high for multiple instances simultaneously.

The Op Amp has high and low bandwidth/power operating modes. The user can trim the input offset error for one or both modes, depending on the application. The complementary P and N channel differential pairs on the input allows full rail-to-rail input voltages to be applied to the amplifier inputs. Each differential pair should be trimmed independently to avoid interactions during the calibration procedure. Therefore, there are four sets of trim adjustment bit fields to account for the two input differential pairs and two power modes described above:

  • NOFFSETLP[4:0]
  • POFFSETLP[4:0]
  • NOFFSETHP[4:0]
  • POFFSETHP[4:0]

The procedure for calibrating the input offset error assumes that the user will use minimal external components and will measure voltage offsets using the ADC available on the device:

  1. Configure the Op Amp for Unity Gain mode using the internal feedback connection.
  2. Connect the non-inverting input of the Op Amp to a midscale voltage reference of VDD/2.
  3. Select either high power (high bandwidth) or low power (low bandwidth) operational mode.
  4. Disable the P channel differential input pair and enable the N-channel differential pair.
  5. Measure the input and output voltage of the Op Amp using an external meter or the internal ADC.
  6. Subtract the input voltage measurement from the output voltage measurement value to determine the amount of offset error.
  7. Raise or lower the value in the NOFFSETxx register and repeat steps 5 and 6 until the offset error is nulled out.
  8. Enable the P channel differential pair of the op amp and disable the N channel differential pair.
  9. Repeat steps 5-6 and adjust the POFFSETxx register to null out the offset error.
  10. Change the Op Amp power mode (step 3) and repeat steps 4-9 to trim the Op Amp offset voltage in the second power mode, using the appropriate POFFSETxx and NOFFSETxx trim registers.
  11. Enable both the P channel and N channel differential pair to return the Op Amp to normal operation with full input voltage range.
  12. Save the values of the POFFSETxx and NOFFSETxx SFRs in non-volatile memory for later retrieval and use by the application.