13.4.12 Bit Manipulation

The 32-bit DMA Controller can perform real-time bit manipulation on the 32-bit data word being moved from the source to the destination location. The bit manipulation consists of invert, clear and set functions, connected with their associated mask register. Note that each DMA channel is equipped with a one-bit manipulation logic block, and bit manipulation is applied to the DMABUF[31:0] bits during the write cycle, when the data are being stored to the destination location, once the bandwidth has been allocated to the requesting DMA channel.

Each mask register bit (see DMAxINV, DMAxCLR and DMAxSET) is responsible for enabling its bit manipulation function onto the corresponding data bit, where logic ‘0’ maintains the original bit value of the input data. The data coming out of the bit manipulation logic block can be expressed as:

{[DMABUF XOR DMAINV]

AND ~DMACLR}

OR DMASET

In Byte mode or Word mode, DMA bit manipulation does not automatically account for byte or Word mode settings. For instance, to set bit 0 in Byte mode, bits 0, 8, 16 and 24 may need to be set. In Byte mode, DMAxSET operates such that [0:7] = [15:8] = [23:16] = [31:24], whereas in Word mode, DMAxSET spans [15:0] = [31:16]. This approach also applies to the DMAxINV and DMAxCLR registers.