20.5.2.2.3 Receiving Acknowledge from the Client

On the falling edge of the eighth SCLx clock, the TBF status bit is cleared and the host will deassert the SDAx pin, allowing the client to respond with an Acknowledge. The host will then generate a ninth SCLx clock.

This allows the client device being addressed to respond with an ACK bit during the ninth bit time if an address match occurs or data was received properly. A client sends an Acknowledge when it has recognized its device address (including a general call) or when the client has properly received its data.

The status of ACK is written into the ACKSTAT bit (I2CxSTAT1[15]) on the falling edge of the ninth SCLx clock. After the ninth SCLx clock, the module generates the I2CxIF interrupt if HDTXIE (I2CxINTC[1]) bit and HSTIE(I2CxINTC[13]) are enabled, and enters into the Idle state until the next data byte is loaded into the I2CxTRN register.