1.3.2.3 PF_CCC_Dyn_0
(Ask a Question)This CCC is dynamically reconfigured using DRI interface. The input for the CCC is from 160 MHz on-chip oscillator. Four Output clocks are configured at 100 MHz, 50 MHz, 100 MHz, and 50 MHz and their respective Output enables are used.
The Output enables are used to switch the Output clock frequencies in glitch-free way.