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Low-Power, 32-bit Cortex-M0+ MCU with Advanced Analog and PWM SAM D21/DA1 Family
Low-Power, 32-bit Cortex-M0+ MCU with Advanced Analog and PWM SAM D21/DA1 Family
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ATSAMD21E15 ATSAMD21E15L ATSAMD21E16 ATSAMD21E16L ATSAMD21E17 ATSAMD21E18 ATSAMD21G15 ATSAMD21G16 ATSAMD21G16L ATSAMD21G17 ATSAMD21G18 ATSAMD21J15 ATSAMD21J16 ATSAMD21J17 ATSAMD21J18
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  2. 48 Data Sheet Revision History
  3. 48.10 Rev. N – 10/2016

SAM D21/DA1 Family

  • Features
  • 1 Description
  • 2 Configuration Summary
  • 3 SAM D21 Ordering Information(1)
  • 4 Block Diagram
  • 5 Pinout
  • 6 Signal Descriptions List
  • 7 I/O Multiplexing and Considerations
  • 8 Power Supply and Start-Up Considerations
  • 9 Product Mapping
  • 10 Memories
  • 11 Processor And Architecture
  • 12 Peripherals Configuration Summary
  • 13 DSU - Device Service Unit
  • 14 Clock System
  • 15 GCLK - Generic Clock Controller

  • 16 PM – Power Manager
  • 17 SYSCTRL – System Controller
  • 18 WDT – Watchdog Timer
  • 19 RTC – Real-Time Counter
  • 20 DMAC – Direct Memory Access Controller
  • 21 EIC – External Interrupt Controller
  • 22 Nonvolatile Memory Controller (NVMCTRL)
  • 23 PORT - I/O Pin Controller
  • 24 EVSYS – Event System
  • 25 SERCOM – Serial Communication Interface
  • 26 SERCOM USART
  • 27 SERCOM SPI – SERCOM Serial Peripheral Interface
  • 28 SERCOM I2C – Inter-Integrated Circuit
  • 29 I2S - Inter-IC Sound Controller
  • 30 TC – Timer/Counter
  • 31 TCC – Timer/Counter for Control Applications
  • 32 USB – Universal Serial Bus
  • 33 ADC – Analog-to-Digital Converter
  • 34 AC – Analog Comparators
  • 35 DAC – Digital-to-Analog Converter
  • 36 Peripheral Touch Controller (PTC)
  • 37 Electrical Characteristics at 85℃
  • 38 Electrical Characteristics at 105°C
  • 39 Electrical Characteristics at 125°C
  • 40 AEC-Q100 125°C Specifications
  • 41 SAM DA1 Electrical Characteristics
  • 42 Appendix A
  • 43 Appendix B
  • 44 Packaging Information
  • 45 Schematic Checklist
  • 46 Conventions
  • 47 Acronyms and Abbreviations
  • 48 Data Sheet Revision History
    • 48.1 Revision H - September 2021
    • 48.2 Revision G - April 2021
    • 48.3 Revision F - March 2020
    • 48.4 Revision E - January 2020
    • 48.5 Rev D - 9/2018
    • 48.6 Rev. C – 06/2018
    • 48.7 Rev. B – 04/2018
    • 48.8 Rev. A – 01/2017
    • 48.9 Rev. O – 12/2016
    • 48.10 Rev. N – 10/2016
    • 48.11 Rev. M – 09/2016
    • 48.12 Rev. L – 09/2016
    • 48.13 Rev. K – 09/2016
    • 48.14 Rev. J – 07/2016
    • 48.15 Rev. I – 03/2016
    • 48.16 Rev. H – 01/2016
    • 48.17 Rev. G – 09/2015
    • 48.18 Rev. F – 07/2015
    • 48.19 Rev. E – 02/2015
    • 48.20 Rev. D – 09/2014
    • 48.21 Rev. C – 07/2014
    • 48.22 Rev. B – 07/2014
    • 48.23 Rev. A - 02/2014
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48.10 Rev. N – 10/2016

I/O Multiplexing and Considerations
  • Multiplexed Signals: Updated table note 6 with information on PA24 and PA25.
Memories
  • NVM User Row Mapping: Added BOOTPROT default value for WLCSP.
TC – Timer/Counter
  • Clocks: Corrected TC instance numbers.
  • Counter Mode: Corrected TC instance numbers.
Electrical Characteristics at 85℃
  • Normal I/O Pins: Added condition to Pull-up - Pull-down resistance.

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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