48.4 Revision E - January 2020

This revision encompasses changes made to combine the SAM D21 Data Sheet with the SAM DA1 Data Sheet to improve readability and information access.

SectionDescription
Block DiagramAdded arrow between PORT and AHB-APB BRIDGE B.
PinoutUpdated section titles
Product MappingUpdated the diagram to show the Internal Flash.
PORT I/O Pin ControllerCorrected the WRCONFIG register to show the DRVSTR bit.
SERCOMUnder Clock Generation - Baud-Rate Generator, the table was updated with a new information and equations.
SERCOM USART
  • Information regarding FIFO was removed as it is not supported on this device
  • The FIFOCLR bit was removed from the CTRLB register
  • The FIFOSPACE and FIFOPTR registers were removed
SERCOM SPI
  • Information on FIFO was removed as it is not supported on this device
  • The FIFOCLR bit was removed from the CTRLB register
  • The FIFOSPACE and FIFOPTR registers were removed
SERCOM I2C
  • Information on FIFO was removed as it is not supported on this device
  • The FIFOCLR bit was removed from the CTRLB Slave Register
  • Bit fields RXFF and TXFE were removed from the INTENCLR, INTENSET, and INTFLAG Slave Registers
  • The LENERR bit was removed from the STATUS Slave Register
  • Registers FIFOSPACE and FIFOPTR were removed from the Slave Registers
  • The FIFOCLR bit was removed from the CTRLB Master Register
  • Bit fields, RXFF and TXFE, were removed from the INTENCLR, INTENSET, and INTFLAG Master Registers
  • Registers FIFOSPACE and FIFOPTR were removed from the Master Registers
Timer Counter (TC)
TCC
  • FCTRLA and FCTRLB had their naming corrected
  • In the WEXCTRL register the DTIEN bit had the numbering updated
  • In the DRVCTRL register the numbering was updated for the INVENx, NRVx, and NREx bits
  • In the EVCTRL register the numbering was updated for the MCEOx, MCEIx, TCEIx, and TCINVx Registers
  • In the INTENCLR, INTENSET, and INTFLAG registers the numbering was updated for the MCx bit
  • In the STATUS register the numbering was updated for the CMPx and FAULTx bits
  • The PATT register was updated to properly display the PGVx and PGEx bits
  • The PATTB register was updated to properly display the PGVBx and PGEBx bits
USBUpdated cross references.
ADCUpdated the MUXPOS Bit table in the INPUTCTRL register.
AC
  • Updated the STARTx bit numbering in the CTRLB register
  • Updated the bit numbering for the COMPEIx, COMPEOx, and WINEOx bits in the EVCTRL register
  • Updated the bit numbering for the WINx, and COMPx bits in the INTENCLR, INTENSET, and INTFLAG registers
  • Updated the bit numbering for the WSTATEx and STATEx bits in the STATUSA register
  • Updated the bit numbering for the READYx bit in the STATUSB register
  • Updated the bit numbering for the WSTATEx and STATEx bits in the STATUSC register
  • Updated the bit numbering for the WINTSELx and WENx bits in the WINCTRL register
SAM DA1 Electrical CharacteristicsThis section was migrated into this data sheet from the original SAM DA1 data sheet.
Schematic ChecklistUpdated External Reset Circuit with changes to the diagram External Reset Circuit Schematic.
Packaging InformationUpdated Package Markings with a new marking diagram.