36.14.18 PHY Control Register 4C

Note: The USB PHY values must be loaded from the CAL OTP area into the USB PHY registers by software, before enabling the USB, to achieve the specified accuracy.

Table 36-108. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Grey cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
K	Write to clear	S	Software settable bit	—	—

Name:	PHY4C
Offset:	0x154C
Reset:	0x00000000
Property:	PAC Write-Protection


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8

Access
Reset


Bit	7	6	5	4	3	2	1	0
	BSESSVALIDTUNE[1:0]					VBUSVALTUNE[2:0]
Access	R/W	R/W				R/W	R/W	R/W
Reset	0	0				0	0	0

Bits 7:6 – BSESSVALIDTUNE[1:0] B Session Valid Reference Tune

Settings include the lower bits (PHY4C.6:7) and the upper bit (PHY50.0).

Value	Description
111	2.16 V
110	2.58 V
101	2.52 V
100	2.46 V
011	2.22 V
010	2.28 V
001	2.34 V
000	2.4 V (Default)

Bits 2:0 – VBUSVALTUNE[2:0] VBUS Valid Reference Tune

Value	Description
111	4.3 V
110	4.65 V
101	4.6 V
100	4.55 V
011	4.3 V
010	4.4 V
001	4.5 V
000	4.45 V