36.14 Register Summary: Device Mode Endpoint1-7 Registers

For descriptions and definitions of both Register and bitfield properties, refer to Register Properties.

OffsetNameBit Pos.76543210

0x00

...

0x1011

Reserved         
0x1012TXCSRL7:0INCOMPRXCLRDTSENTSTALLSENDSTALLFLUSHFIFOUNDERRUNFIFONETXPKTRDY
0x1013TXCSRH7:0AUTOSETISOMODEDMAREQENFRCDATATOGDMAREQMODE  

0x1014

...

0x1015

Reserved         
0x1016RXCSRL7:0CLRDATATOGSENTSTALLSENDSTALLFLUSHFIFODATAERROROVERRUNFIFOFULLRXPKTRDY
0x1017RXCSRH7:0AUTOCLEARISODMAREQENABDISNYETDMAREQMODE  INCOMPRX

0x1018

...

0x14FF

Reserved         
0x1500PHY007:0RXPHSSEL[2:0]SLEWRATE[1:0]PREEMP[2:0]
15:8        
23:16        
31:24        
0x1504PHY047:0SQUELCH[2:0]HIZReservedTXPHSSEL[2:0]
15:8        
23:16        
31:24        
0x1508PHY087:0       SQUELCH
15:8        
23:16        
31:24        
0x150CPHY0C7:0TUNE[2:0]     
15:8        
23:16        
31:24        
0x1510PHY107:0DRVTUNE[2:0]TUNE[4:0]
15:8        
23:16        
31:24        
0x1514PHY147:0ODT  BYPSSSQUELCH COMPBYPSS[2:0]
15:8        
23:16        
31:24        
0x1518PHY187:0      ODT[1:0]
15:8        
23:16        
31:24        
0x151CPHY1C7:0FSLSDIFF     ODTBYPASS 
15:8        
23:16        
31:24        
0x1520PHY207:0HSSLEW[1:0]      
15:8        
23:16        
31:24        
0x1524PHY247:0HSDRIVST[1:0]HSPREEMPST[2:0]PREEMPHENOTGPDNHSSLEW
15:8        
23:16        
31:24        
0x1528PHY287:0HSDRVCOMP[2:0]DISCONDET[3:0]HSDRIVST
15:8        
23:16        
31:24        

0x152C

...

0x1543

Reserved         
0x1544PHY447:0FRCSESSEND   FRCVBUSVALDIGDBGPLLDAMP 
15:8        
23:16        
31:24        
0x1548PHY487:0SESSENDTUNE[2:0]  VBUSCHRGEFRCBSESSVALFRCASESSVAL
15:8        
23:16        
31:24        
0x154CPHY4C7:0BSESSVALIDTUNE[1:0]   VBUSVALTUNE[2:0]
15:8        
23:16        
31:24        
0x1550PHY507:0COMPCURREF[2:0] ASESSVALIDTUNE[2:0]BSESSVALIDTUNE
15:8        
23:16        
31:24