51.14 Maximum Clock Frequencies
| AC CHARACTERISTICS | Standard
Operating Conditions: VDDREG=VDDIO=AVDD 1.71V to 3.63V (unless otherwise
stated) Operating temperature: -40°C ≤ TA ≤ +85°C for Industrial |
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|---|---|---|---|---|
| Param. No. | Symbol | Characteristics | Max | Units |
| FCLK_1 | FCY | MCU clock freq | 120 | MHz |
| FCLK_3 | fAHB | AHB clock freq | 120 | MHz |
| FCLK_5 | fAPBn | APBA, APBB, APBC clock freq | 120 | MHz |
| FCLK_6 | fGCLKGEN[0] | GCLK clock freq output | 120 | MHz |
| fGCLKGEN[1:7] | 200 | MHz | ||
| fGCLKGEN[8:11] | 100 | MHz | ||
| FCLK_7 | fGCLK_PLL | PLL reference clock freq | 48 | MHz |
| FCLK_11 | fGCLK_DFLL48M_REF | DFLL 48M reference clock freq | 1 | MHz |
| FCLK_13 | fGCLK_EIC | EIC input clock freq | 100 | MHz |
| FCLK_15 | fGCLK_FREQM_MSR | FREQM Measure Clock Frequency | 200 | MHz |
| FCLK_17 | fGCLK_FREQM_REF | FREQM Reference Clock Frequency | 100 | MHz |
| FCLK_19 | fGCLK_EVSYS_CHANNELx | EVSYS channel x input clock freq | 100 | MHz |
| FCLK_21 | fGCLK_SERCOMx_SLOW | Common SERCOM slow input clock freq | 32 | kHz |
| FCLK_23 | fGCLK_SERCOMx_CORE, x = 1 to 7 | SERCOMx input clock freq | 100 | MHz |
| fGCLK_SERCOM0_CORE | SERCOM0 input clock freq | 160 | MHz | |
| FCLK_25 | fGCLK_CANx | CAN input clock freq | 100 | MHz |
| FCLK_27 | fGCLK_USBFS | USB FS input clock freq | 48 | MHz |
| FCLK_29 | fGCLK_IxS | IxS input clock freq | 100 | MHz |
| FCLK_31 | fGCLK_SDHCx_SLOW | Common SDHC slow input clock freq | 32 | kHz |
| FCLK_33 | fGCLK_SDHCx_CORE | SDHCx input clock freq | 106 | MHz |
| FCLK_35 | fGCLK_TCCx | TCCx input clock freq | 200 | MHz |
| FCLK_42 | fGCLK_PDEC | PDEC input clock freq | 200 | MHz |
| FCLK_43 | fGCLK_CCL | CCL input clock freq | 100 | MHz |
| FCLK_45 | fGCLK_GCLKINx | External GCLKx input clock freq | 50 | MHz |
| FCLK_47 | fGCLK_CM33_TRACE | CM33 Trace input clock freq | 50 | MHz |
| FCLK_49 | fGCLK_AC | Analog comparator peripheral module clock freq | 100 | MHz |
| FCLK_51 | fGCLK_ADCx | ADCx input clock freq | 100 | MHz |
| FCLK_55 | fGCLK_PTC | PTC input clock freq | 50 | MHz |
| FCLK_61 | fGCLK_ETH | Ethernet input clock freq | 25 | MHz |
| FCLK_62 | fGCLK_ETH_TSU (1) | Ethernet TSU input clock freq | < fAHB | MHz |
| FCLK_73 | fGCLK_QSPI | QSPI internal GCLK freq | 160 | MHz |
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Note:
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