51.25 I2C Electrical Specifications

Figure 51-11. I2C Start/Stop Bits Host Mode AC Timing Diagrams
Figure 51-12. I2C Bus Data Host Mode AC Timing Diagrams
Table 51-36. I2C Host Mode AC Electrical Specifications
AC CHARACTERISTICS Standard Operating Conditions: VDDREG=VDDIO=AVDD 1.71V to 3.63V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +85°C for Industrial
Param. No. Symbol Characteristics Min. Max. Units Conditions
I2CM_1 TL0:SCL Host Clock Low Time 100 kHz mode 4.7 — µs VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 1.3 — µs
1 MHz mode 0.5 — µs VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 160 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CM_3 THI:SCL Host Clock High Time 100 kHz mode 4 — µs VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 0.6 — µs
1 MHz mode 0.26 — µs VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 60 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CM_5 TF:SCL SDAx and SCLx Fall Time 100 kHz mode — 300 ns VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode — 300 ns
1 MHz mode — 120 ns VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode — 40 ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CM_7 TR:SCL SDAx and SCLx Rise Time 100 kHz mode — 1000 ns VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode — 300 ns
1 MHz mode — 120 ns VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode — 40 ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CM_9 TSU:DAT Data Setup Time 100 kHz mode 250 — ns VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 100 — ns
1 MHz mode 50 — ns VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 10 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CM_11 THD:DAT (1) Data Hold Time 100 kHz mode 300 — ns VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 300 — ns
1 MHz mode 300 — ns VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 5 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CM_13 TSU:STA Start Condition Setup Time 100 kHz mode 4.7 — µs VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 0.6 — µs
1 MHz mode 0.26 — µs VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 160 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CM_15 THD:STA Start Condition Hold Time 100 kHz mode 4 — µs VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 0.6 — µs
1 MHz mode 0.26 — µs VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 160 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CM_17 TSU:ST0 Stop Condition Setup Time 100 kHz mode 4 — µs VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 0.6 — µs
1 MHz mode 0.26 — µs VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 160 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CM_21 TAA:SCL Output Valid from Clock 100 kHz mode — 3.45 µs VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode — 0.9 µs
1 MHz mode — 0.45 µs VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode — 100 ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CM_23 TBF:SDA (2) Bus Free Time 100 kHz mode 4.7 — µs VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 1.3 — µs
1 MHz mode 0.5 — µs VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 160 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
Note:
  1. Longest delay between data hold timing based on bitfield SDAHOLD of register CTRLA from SERCOM Module and timing based on 4 period of GCLK_SERCOM for 100kHz/400kHz/1MHz mode.
  2. The amount of time the bus must be free before a new transmission can start (STOP condition to START condition).
Figure 51-13. I2C Start/Stop Bits Client Mode AC Timing Diagrams
Figure 51-14. I2C Bus Data Client Mode AC Timing Diagrams
Table 51-37. I2C Client Mode AC Electrical Specifications
AC CHARACTERISTICS_ Standard Operating Conditions: VDDREG=VDDIO=AVDD 1.71V to 3.63V (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for Industrial
Param. No. Symbol Characteristics Min. Max. Units Conditions
I2CS_1 TL0:SCL Client Clock Low Time 100 kHz mode 4.7 — µs VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 1.3 — µs
1 MHz mode 0.5 — µs VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 160 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CS_3 THI:SCL Client Clock High Time 100 kHz mode 4 — µs VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 0.6 — µs
1 MHz mode 0.26 — µs VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 60 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CS_5 TF:SCL SDAx and SCLx Fall Time 100 kHz mode — 300 ns VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode — 300 ns
1 MHz mode — 120 ns VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode — 40 ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CS_7 TR:SCL SDAx and SCLx Rise Time 100 kHz mode — 1000 ns VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode — 300 ns
1 MHz mode — 120 ns VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode — 40 ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CS_9 TSU:DAT Data Setup Time 100 kHz mode 250 — ns VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 100 — ns
1 MHz mode 50 — ns VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 10 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CS_11 THD:DAT (1) Data Hold Time 100 kHz mode 300 — ns VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 300 — ns
1 MHz mode 300 — ns VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 5 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CS_13 TSU:STA Start Condition Setup Time 100 kHz mode 4.7 — µs VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 0.6 — µs
1 MHz mode 0.26 — µs VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 160 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CS_15 THD:STA Start Condition Hold Time 100 kHz mode 4 — µs VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 0.6 — µs
1 MHz mode 0.26 — µs VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 160 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CS_17 TSU:ST0 Stop Condition Setup Time 100 kHz mode 4 — µs VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 0.6 — µs
1 MHz mode 0.26 — µs VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 160 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CS_21 TAA:SCL Output Valid from Clock 100 kHz mode — 3.45 µs VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode — 0.9 µs
1 MHz mode — 0.45 µs VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode — 100 ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
I2CS_23 TBF:SDA (2) Bus Free Time 100 kHz mode 4.7 — µs VDDIOx = 3.3V,

IPULL-UP = 3mA,

CLOAD = 400 pF
400 kHz mode 1.3 — µs
1 MHz mode 0.5 — µs VDDIOx = 3.3V,

IPULL-UP = 20 mA,

CLOAD = 550 pF
3.4 MHz mode 160 — ns VDDIOx = 3.3V,

IPULL-UP = 12 mA,

CLOAD = 100 pF
Note:
  1. Longest delay between data hold timing based on bitfield SDAHOLD of register CTRLA from SERCOM Module and timing based on 4 period of GCLK_SERCOM for 100kHz/400kHz/1MHz mode.
  2. The amount of time the bus must be free before a new transmission can start (STOP condition to START condition).