35.6.11 SQI COMMAND THRESHOLD REGISTER

Table 35-11. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit
Name: CMDTHR
Offset: 0x114
Reset: 0x0000
Property: -

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
   TXCMDTHR[5:0] 
Access R/WR/WR/WR/WR/WR/W 
Reset 000000 
Bit 76543210 
   RXCMDTHR[5:0] 
Access RWRWRWRWRWRW 
Reset 000000 

Bits 13:8 – TXCMDTHR[5:0] Transmit Command Threshold bits <5:0>

In transmit initiation mode, the SQI module performs a transmit operation when transmit command threshold bytes are present in the Tx buffer. These bits should usually be set to '1' for normal Flash commands, and set to a higher value for page programming. For 16-bit mode, the value should be a multiple of 2.

Bits 5:0 – RXCMDTHR[5:0] Receive Command Threshold bits <5:0>

In receive initiation mode, the SQI module attempts to perform receive operations to fetch the receive command threshold number of bytes in the receive buffer. If space for these bytes is not present in the buffer, the SQI will not initiate a transfer. For 16-bit mode, the value should be a multiple of 2.

If software performs any reads, thereby reducing the buffer count, hardware would initiate a receive transfer to make the buffer count equal to the value in these bits. If software would not like any more words latched into the buffer, command initiation mode needs to be changed to Idle before any buffer reads by software.

In the case of Boot/xIP mode, the SQI module will use the System Bus burst size, instead of the receive command threshold value.

Note:

These bits should only be programmed when a receive is not active (i.e., during Idle mode or a transmit).