53.6.46 MCAN TSU Timestamp Configuration
| Name: | MCAN_TSU_TSCFG |
| Offset: | 0x164 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| TBPRE[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SCP | TBCS | TSUE | |||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 |
Bits 15:8 – TBPRE[7:0] Timebase Prescaler
The value by which the oscillator frequency is divided to generate the timebase counter clock. Valid values for the timebase prescaler are 0 to 255. The actual interpretation by the hardware of this value is such that one more than the value programmed here is used. Affects only the TSU internal timebase.
Bit 2 – SCP Select Capturing Position
| Value | Description |
|---|---|
| 0 | Timestamp captured at EOF |
| 1 | Timestamp captured at SOF |
Bit 1 – TBCS Timebase Counter Select
No external timebase is connected. Set TBCS to 0.
| Value | Description |
|---|---|
| 0 | Timestamp value captured from internal timebase counter (32 bits) |
| 1 | Timestamp value captured from external timebase counter (32 bits) |
Bit 0 – TSUE Timestamp Unit Enable
| Value | Description |
|---|---|
| 0 | TSU disabled |
| 1 | TSU enabled |