33.2 Architectural Overview

The WDT is a free-running timer with a configurable postscaler. The counter is clocked with an external reference clock until the counter value exceeds the selected WDT period. If enabled, the WDT will continue to operate even if the main processor clock (e.g., the crystal oscillator) fails. The WDT, when enabled, operates from the internal Low-Power RC (LPRC) oscillator clock source or user selectable clock source in Run mode. Refer to Figure 33-1 for a block diagram of the WDT.

The WDT uses separate internal counters for use in Run mode and Sleep/Idle modes. One counter operates only in Run mode; the count value of this counter is frozen when the device is in Sleep or Idle modes. The second counter operates only in Sleep and Idle modes; it is reset when entering Sleep or Idle. In either case, this provides the following benefits:

• A different WDT clock source can be used in Run mode.
• A different postscaler value may be used in Run mode vs. Sleep/Idle modes.
• The Run mode WDT count is preserved while in Sleep or Idle modes, which makes it easier to manage the WDT while in windowed mode.