17.5.5 External Period Reset Mode
External Period Reset mode for power control monitors the inductor current and varies
the PWM period to control power delivery. When the inductor current returns to
‘0
’, the PWM cycle will restart. The PWM is configured as
follows:
- Independent Edge PWM mode
- Complementary Output mode
- Self-Triggered mode
The initial programmed PWM period may be shortened depending on the inductor current compared to a predetermined trip point. The Sync PCI block is used to control cycle truncation. The comparator (CMP1 Out) output is used as the input to the Sync PCI block, and an inverted PWM1H signal is used as a qualifier to allow truncation only on the duty cycle inactive time of a cycle, as shown by the arrows in Figure 17-46. The PCI block is reset for the next cycle using the auto-terminate function.
External Period Reset Mode
void PWMInitialization(void);
int main() {
PWMInitialization();
while(1);
return 0;
}
void PWMInitialization(void) {
configure_PLL2_Fout_200MHz_and_VCODIV_500_MHz();
clock_PWM_from_PLL2_Fout();
initialize_CMP1_and_clock_from_PLL2_VCODIV();
//PWM generator 1 uses PG1DC, PG1PER, PG1PHASE registers
PG1CONbits.MDCSEL = 0;
PG1CONbits.MPERSEL = 0;
PG1CONbits.MPHSEL = 0;
PG1CONbits.MSTEN = 0; //PWM Generator does not broadcast UPDATE status bit state or EOC signal
PG1CONbits.TRGMOD = 0b01; //PWM Generator operates in Re-Triggerable mode
PG1CONbits.SOCS = 0b0000; //Start of cycle (SOC) = local EOC is OR'd with PCI sync
PG1CONbits.UPDMOD = 0b000; //Update the data registers at start of next PWM cycle (SOC)
PG1CONbits.MODSEL = 0b000; //Independent edge triggered mode
PG1CONbits.CLKSEL = 1; //PWM Generator 1 uses PWM Master Clock, undivided and unscaled
PG1IOCONbits.PMOD = 0b00; //PWM Generator outputs operate in Complementary mode
//PWM Generator controls the PWM1H and PWM1L output pins
PG1IOCONbits.PENH = 1;
PG1IOCONbits.PENL = 1;
//PWM1H and PWM1L output pins are active high
PG1IOCONbits.POLH = 0;
PG1IOCONbits.POLL = 0;
//For a 200MHz PWM clock, this will result in 100kHz PWM frequency
PG1PER = (2000 << 4); //Time units are 1/16 of a PWM clock
PG1DC = (500 << 4); //25% duty cycle
PG1PHASE = 0; //No Phase offset in rising edge of PWM
PG1DTbits.DTH = (40 << 4); //40 PWM clocks of dead time on PWM1H
PG1DTbits.DTL = (40 << 4); //40 PWM clocks of dead time on PWM1L
PG1LEBbits.PHR = 1; //Rising edge of PWM1H will trigger the LEB counter
PG1LEBbits.LEB = (80 << 4); //80 PWM clocks of LEB
//PCI logic configuration for current reset (PCI sync mode),
//comparator 1 output (current reset signal) as PCI source,
//and PWM1H falling edge as acceptance qualifier
PG1EVTbits.PWMPCI = 0b000; //PWM Generator #1 output used as PCI signal
PG1SPCIbits.TERM = 0b001; //Terminate when PCI source transitions from active to inactive
PG1SPCIbits.TSYNCDIS = 1; //Termination of latched PCI occurs immediately
PG1SPCIbits.AQSS = 0b100; //Inverted PWM1H is selected as acceptance qualifier because PWM should be reset in OFF time
PG1SPCIbits.AQPS = 1; //Acceptance qualifier inverted to accept PCI signal when PWM1H on time is over
PG1SPCIbits.PSYNC = 0; //PCI source is not synchronized to PWM EOC so that current limit resets PWM immediately
PG1SPCIbits.PSS = 0b11011; //CMP1 out is selected as PCI source signal
PG1SPCIbits.PPS = 1; //PCI source signal is inverted
PG1SPCIbits.ACP = 0b011; //Latched PCI is selected as acceptance criteria to work when CMP1 out is active
PG1SPCIbits.TQSS = 0b000; //No termination qualifier used so terminator will work straight away without any qualifier
//Enable PWM generator 1
PG1CONbits.ON = 1;
}