3.2 Decoupling Capacitors

The use of decoupling capacitors on every pair of power supply pins, such as V_DD, V_SS, AV_DD and AV_SS, is required.

Consider the following criteria when using decoupling capacitors:

• Value and type of capacitor: Recommendation of 0.1 µF (100 nF), in parallel with a 1000 pF (1 nF), 10-20V. These capacitors should be low-ESR and have a resonance frequency in the range of 20 MHz and higher. Ceramic capacitors are recommended.
• Placement on the Printed Circuit Board: The decoupling capacitors should be placed as close to the pins as possible. It is recommended to place the capacitors on the same side of the board as the device. If space is constricted, the capacitor can be placed on another layer on the PCB using a via; however, ensure that the trace length from the pin to the capacitor is within one-quarter inch (6 mm) in length.
• Handling high-frequency noise: If the board is experiencing high-frequency noise above tens of MHz, add an additional ceramic-type capacitor in parallel to the decoupling capacitors. The value can be in the range of 0.01 µF to 0.001 µF. Place this capacitor next to the primary decoupling capacitors. In high-speed circuit designs, consider implementing a decade set of capacitances as close to the power and ground pins as possible. For example, 0.1 µF in parallel with 0.01 µF and 0.001 µF.
• Maximizing performance: On the board layout from the power supply circuit, run the power and return traces to the decoupling capacitors first and then to the device pins. This ensures that the decoupling capacitors are first in the power chain. Equally important is to keep the trace length between the capacitor and the power pins to a minimum, thereby reducing PCB track inductance.

  Note:

  1. The center pad, if available on the bottom of the package, can be left floating or connected to V_SS.
  2. The four corner anchor pads, if available in the package, are internally connected to the bottom pad, and must be connected to the same ground as the center pad.