29.4.1 Basic Operation

The user loads the step commands (8-bit values) into the PTG Queue registers. The commands define a sequence of events for generating the trigger output signals to the peripherals. The step commands can also be used to generate the interrupt requests to the processor.

The PTG module is enabled and clocked when the ON bit (PTGCON[15]) = 1. While the PTGSTRT bit (PTGCON[7]) = 0, the PTG module is in the Halt state.

Note:
  1. The control registers cannot be modified when the PTG module is in the Halt state.
  2. The PTG module must be enabled (ON = 1) prior to attempting to set the PTGSTRT bit.
  3. The user should not attempt to set the ON and PTGSTRT bits within the same data write cycle.

Subsequently, setting PTGSTRT = 1 will enable the module for Continuous mode execution of the step command queue. The PTG sequencer will start to read the step queue at the address held in the Queue Pointer (PTGQPTR). Each command byte is read, decoded and executed sequentially. The minimum duration of any step command is one PTG clock as explained in PTG Clock Selection.

Step commands will execute sequentially until any of the following occurs:
  • A PTGJMP, PTGJMPC0 or PTGJMPC1 (flow change) step command is executed.
  • The user clears the PTGSTRT bit, stopping the PTG Sequencer. No further step commands are read/decoded and execution halts.
  • The internal Watchdog Timer overflows, clearing the PTGSTRT bit and stopping the PTG sequencer. No further step commands are read/decoded and execution halts.
  • The PTG module is disabled (ON = 0).

The step commands can also be made to wait on a condition, such as an input trigger edge, a software trigger or a timer match, before continuing execution. For more information, refer to Stopping the Sequencer.