2.81 Parallel Master Port (PMP)

The Parallel Master Port (PMP) is a parallel 8-bit/16-bit I/O module specifically designed to communicate with a wide variety of parallel devices such as communications peripherals, LCDs, external memory devices and micro-controllers. Because the interfaces to parallel peripherals vary significantly, the PMP module is highly configurable.

Using The Library

The key features of PMP :

  • 8-bit,16-bit interface

  • Up to 16 programmable address lines

  • Up to two Chip Select lines

  • Programmable strobe options

  • Address auto-increment/auto-decrement

  • Programmable address/data multiplexing

  • Programmable polarity on control signals

  • Programmable Wait states

Library Interface

Parallel Master Port peripheral library provides the following interfaces:

Functions

NameDescription
PMP_InitializeThis function initializes the PMP controller of the device
PMP_AddressSetSets the current address of the PMP module to the specified address
PMP_AddressGetGets the current address of the PMP module
PMP_MasterSendSends the specified data in Master mode
PMP_MasterReceiveReceives the data in Master mode
PMP_PortIsBusyIdentifies if the (Master mode) PMP port is busy
PMP_AddressPortEnableEnables the port lines specified as PMP address lines
PMP_AddressPortDisableDisables the port lines specified as PMP address lines
Note: Not all APIs maybe implemented. See the specific device family section for available APIs.