2.37 EC Interrupt Aggregator
The EC Interrupt Aggregator works in conjunction with the processor’s interrupt interface to handle hardware interrupts and exceptions.
All interrupts are routed to the ARM processor through the ARM Nested Vectored Interrupt Controller (NVIC). All interrupt sources are aggregated into the GIRQx Source registers. If the interrupt source is active and the interrupt is enabled, the corresponding Result bit is set. In many cases, the Result bit for an individual interrupt source is tied directly to the NVIC. These interrupts are knows as Direct Interrupts. In addition, all GIRQx can also generate an interrupt to the NVIC when any of the enabled interrupts in its group is asserted. The NVIC vectors for the aggregated GIRQ interrupts are known as Aggregate Interrupts. Firmware should not enable the group GIRQ NVIC interrupt at the same time individual direct interrupts for members of the group are enabled. If both are enabled, the processor will receive two interrupts for an event, one from the GIRQ and one from the direct interrupt.
Library Interface
ECIA peripheral library provides the following interfaces:
Functions
| Name | Description |
|---|---|
| ECIA_Initialize | Initializes the ECIA module based on the MCC configuration |
| ECIA_GIRQBlockDisable | Disables the given GIRQ block |
| ECIA_GIRQBlockDisableAll | Disables the interrupt generation from all the GIRQ blocks |
| ECIA_GIRQBlockEnable | Enables the given GIRQ block |
| ECIA_GIRQBlockStatusGet | Reports the status of the group GIRQ interrupt assertion to the NVIC |
| ECIA_GIRQIsInterruptEnabled | Returns the status of the given interrupt source |
| ECIA_GIRQResultGet | Returns the status of the given interrupt source |
| ECIA_GIRQSourceClear | Clears the given interrupt source |
| ECIA_GIRQSourceClearAll | Clears all interrupt sources in all the ECIA blocks |
| ECIA_GIRQSourceDisable | Disables the given interrupt source |
| ECIA_GIRQSourceDisableAll) | Disables all interrupt sources in all the ECIA blocks |
| ECIA_GIRQSourceEnable | Enables the given interrupt source |
| ECIA_InterruptDisable | Disables the given interrupt source |
| ECIA_InterruptEnable | Enables interrupt at both ECIA and NVIC level for the given interrupt source |
Data types and constants
| Name | Type | Description |
|---|---|---|
| ECIA_GIRQ_BLOCK_NUM | Enum | This enum is used to specify the GIRQ block number in various ECIA block control APIs |
| ECIA_INT_SOURCE | Enum | This enum is used to specify the interrupt source in various ECIA APIs |
| GIRQ_AGG_INT_NUM_GET | Macro | This macro returns the aggregate NVIC interrupt number from the given interrupt source |
| GIRQ_DIR_INT_NUM_GET | Macro | This macro returns the direct NVIC interrupt number from the given interrupt source |
| IS_INT_SRC_AGG_OR_DIR | Macro | This macro returns the 0 if the given interrupt source is of aggregate type and returns 1 if the interrupt source is of direct type |