2.58 LCD Controller (LCDC)

The LCD Controller (LCDC) consists of logic for transferring LCD image data from an external display buffer to an LCD module. The LCD has one display input buffer per overlay that fetches pixels through the dual AHB master interface and a lookup table to allow palletized display configurations.

The LCD controller is programmable on a per overlay basis, and supports different LCD resolutions, window sizes, image formats and pixel depths. The LCD is connected to the ARM Advanced High Performance Bus (AHB) as a master for reading pixel data. It also integrates an APB interface to configure its registers.

Using The Library

Refer LCDC API headers for the usage of the LCDC peripheral library.

Library Interface

LCD Controller peripheral library provides the following interfaces:

Functions

NameDescription
LCDCx_AddToQueueEnableIndicates that a valid descriptor has been written to memory
LCDCx_ClockResetResets the pixel clock module
LCDCx_DISPSignalResetResets the DISP signal
LCDCx_GetDisplaySignalStatusActivatedGets the status of the DISP signal
LCDCx_GetPixelClockStatusRunningGets the status of the pixel clock
LCDCx_GetPWMSignalStatusActivatedGets the status of the PWM signal
LCDCx_GetSynchronizationStatusInProgressGets the status of clock domain synchronization
LCDCx_GetTimingEngineStatusRunningGets the status of the timing engine
LCDCx_IRQ_CallbackRegisterRegisters a callback function for the LCDC IRQ handler
LCDCx_IRQ_DisableDisables the specified interrupt
LCDCx_IRQ_EnableEnables the specified interrupt
LCDCx_IRQ_StatusReads the value of the interrupt status register
LCDCx_LAYER_IRQ_DisableDisable the interrupt from the specified layer
LCDCx_LAYER_IRQ_EnableEnables the interrupt from the specified layer
LCDCx_LAYER_IRQ_StatusReads the status of the interrupt from the specified layer
LCDCx_PWMResetResets the PWM module
LCDCx_SetBlenderDMALayerEnableEnables/disables the blender DMA channel
LCDCx_SetBlenderGlobalAlphaSets the global alpha blending coefficient
LCDCx_SetBlenderGlobalAlphaEnableEnables/disables global alpha blending
LCDCx_SetBlenderIteratedColorEnableEnables use of iterated pixel value for final adder stage operand
LCDCx_SetBlenderLocalAlphaEnableEnables/disables local alpha blending
LCDCx_SetBlenderOverlayLayerEnableEnables/disables the overlay blender
LCDCx_SetBlenderUseIteratedColorEnables use of iterated pixel value for pixel difference
LCDCx_SetChannelEnableEnables/disables the DMA channel
LCDCx_SetClockDividerSets the clock divider for the pixel clock
LCDCx_SetClockSourceSelectionSets the LCDC clock source
LCDCx_SetDisplayGuardTimeNumber of frames inserted before and after DISP assertion
LCDCx_SetDisplaySignalPolaritySets the polarity of the DISP signal
LCDCx_SetDisplaySignalSynchronizationSets the sync of the DISP signal with the HYSNC pulse
LCDCx_SetDISPSignalEnableEnables/disables the DISP signal
LCDCx_SetDitheringEnableEnables/disables the LCDC dithering logical unit
LCDCx_SetDMAAddressRegisterSets the Frame Buffer base address
LCDCx_SetDMADescriptorNextAddressSets next DMA descriptor address
LCDCx_SetDMAHeadPointerSets the specified layer's Head Pointer to the DMA descriptor address
LCDCx_SetHorizontalBackPorchWidthSets HSYNC front porch width, give in number of pixel clocks
LCDCx_SetHorizontalFrontPorchWidthSets HSYNC front porch width, give in number of pixel clocks
LCDCx_SetHSYNCPolaritySets the polarity of the HSYNC pulse
LCDCx_SetHSYNCPulseWidthSets HSYNC pulse length, given in pixel clock cycles
LCDCx_SetLayerClockGatingDisableDisables/Enables the clock gating on the LCDC layers
LCDCx_SetLCDDisableInterruptEnableEnables/disables the LCD disable interrupt
LCDCx_SetNumActiveRowsSets the number of active lines (height) in the frame
LCDCx_SetNumPixelsPerLineSets the number of pixels in a line (width) in the frame
LCDCx_SetOutputModeSets the output mode of the LCDC
LCDCx_SetPixelClockEnableEnables/disables the pixel clock
LCDCx_SetPixelClockPolaritySets the pixel clock signal polarity
LCDCx_SetPostPocessingEnableEnables/disables post processing
LCDCx_SetPWMClockSourceSelectionSets the LCDC PWM clock source
LCDCx_SetPWMCompareValueSets the PWM compare value
LCDCx_SetPWMEnableEnables/disables the PWM signal
LCDCx_SetPWMPrescalerSets the configuration of the counter prescaler module
LCDCx_SetPWMSignalPolaritySets the polarity of the PWM signal
LCDCx_SetRGBModeInputSets the input color mode for the specified layer
LCDCx_SetSOFInterruptEnableEnables/disables the start of frame interrupt
LCDCx_SetSYNCEnableEnables/disables the VSYNC and HSYNC signals
LCDCx_SetTransferDescriptorFetchEnableEnables/disables Transfer Descriptor Fetch
LCDCx_SetUseDMAPathEnableEnables/disables the DMA path for the specified layer
LCDCx_SetVerticalBackPorchWidthSets VSYNC back porch width, give in number of lines
LCDCx_SetVerticalFrontPorchWidthSets VSYNC front porch width, give in number of lines
LCDCx_SetVSYNCPolaritySets the polarity of the VSYNC pulse
LCDCx_SetVSYNCPulseEndSets the HSYNC pulse edge where the VSYNC pulse second active edge is synchronized
LCDCx_SetVSYNCPulseHoldConfigSets the VSYNC pulse sync with HSYNC pulse edge
LCDCx_SetVSYNCPulseSetupConfigSets the VSYNC pulse sync with HSYNC pulse edge
LCDCx_SetVSYNCPulseStartSets the HSYNC pulse edge where the VSYNC pulse first active edge is synchronized
LCDCx_SetVSYNCPulseWidthSets VSYNC pulse length, given in pixel clock cycles
LCDCx_SetWindowPositionSets the X, Y position of the specified layer
LCDCx_SetWindowSizeSets the size of the specified layer
LCDCx_SYNCResetResets the timing engine
LCDCx_UpdateAttributeUpdates the specified layer's window attributes
LCDCx_UpdateOverlayAttributesEnableUpdates the layer attributes
LCDCx_WaitForClockRunningWaits for pixel clock to start running. Blocks until PCLK is running
LCDCx_WaitForDISPSignalWaits for DISP signal to be activated. Blocks until Timing engine is activated
LCDCx_WaitForSynchronizationWaits for timing engine to start running. Blocks until Timing engine is running
LCDCx_WaitForSyncInProgressWaits for synchronization to complete. Unblocks when complete

Data types and constants

NameTypeDescription
LCDCx_CLOCK_SOURCEEnumDefines the clock sources for the LCDC peripheral
LCDCx_INPUT_COLOR_MODEEnumDefines the RGB color mode input types
LCDCx_INTERRUPTEnumDefines the interrupts generated by the controller
LCDCx_IRQ_CALLBACKTypedefDefines the data type and function signature for the LCDC callback function
LCDCx_IRQ_CALLBACK_OBJECTStructStruct for LCDC IRQ handler
LCDCx_LAYER_IDEnumDefines the types for the LCDC hardware layers and overlays
LCDCx_LAYER_INTERRUPTEnumDefines the interrupts generated by the layers
LCDCx_OUTPUT_COLOR_MODEEnumDefines the controller output mode types
LCDCx_PWM_CLOCK_SOURCEEnumDefines the clock sources for the LCDC PWM
LCDCx_SIGNAL_POLARITYEnumDefines the polarity of the LCDC control signals
LCDCx_VSYNC_SYNC_EDGEEnumDefines the HSYNC edge where VSYNC is synchronized
Note: Not all APIs maybe implemented. See the specific device family section for available APIs.