15.10.1.1 LDO Regulator
Symbol | Parameter | Conditions | Typ. | Units |
---|---|---|---|---|
VREGSCAL | Voltage scaling | min step size for PLx to Ply transistion | 5 | mV |
Voltage Scaling Period(1) | 1 | µs |
Note: 1. These are based on simulation. These values are not covered by test or
characterization
Symbol | Parameter | Conditions | Typ. | Units |
---|---|---|---|---|
CIN | Input regulator capacitor | 4.7 | µF | |
Ceramic dielectric X7R | 100 | nF | ||
COUT | Output regulator capacitor | 1 | µF | |
Ceramic dielectric X7R | 100 | nF |