8.2.188 GMAC Express MAC Receive Watermark Register
Name: | GMAC_EMAC_RX_WATERMARK |
Offset: | 0x107C |
Reset: | 0x00000000 |
Property: | Read/Write |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
RX_LOW_WATERMARK[15:8] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
RX_LOW_WATERMARK[7:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
RX_HIGH_WATERMARK[15:8] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
RX_HIGH_WATERMARK[7:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 31:16 – RX_LOW_WATERMARK[15:0] Receive Watermark Low Threshold
Defines the low threshold of the receive memory for which a zero length pause frame is transmitted when the memory fill level falls below the threshold (the action is performed only if the last pause frame transmitted was non-zero).
Bits 15:0 – RX_HIGH_WATERMARK[15:0] Receive Watermark High Threshold
Defines the high threshold of the receive memory for which a zero length pause frame is transmitted when the memory fill level exceeds the threshold.