8.2.297 GMAC Express MAC ENST Start Time Queue Register
Name: | GMAC_EMAC_ENST_START |
Offset: | 0x1800 |
Reset: | 0x0001FFFF |
Property: | Read/Write |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
START_SEC[1:0] | START_NSEC[29:24] | ||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
START_NSEC[23:16] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
START_NSEC[15:8] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
START_NSEC[7:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bits 31:30 – START_SEC[1:0] Seconds for Start Time
Defines the seconds for the absolute start time of the queue.
Bits 29:0 – START_NSEC[29:0] Nanoseconds for Start Time
Defines the nanoseconds for the absolute start time of the queue.