8.2.294 GMAC Express MAC Transmit Queue Segment Allocation Register
Name: | GMAC_EMAC_TQSA |
Offset: | 0x15A0 |
Reset: | 0x00000000 |
Property: | Read/Write |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
Access | |||||||||
Reset |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
SEGALLOCQ0[2:0] | |||||||||
Access | R/W | R/W | R/W | ||||||
Reset | 0 | 0 | 0 |
Bits 2:0 – SEGALLOCQ0[2:0] Segment Allocation for EMAC
Number of segments allocated to EMAC. This should be entered as a log 2; for example, entering a value of 2 grants 4 segments. A maximum of 16 segments can be granted.
There is no need to change this register for the EMAC.