50.3 Rev. B - 11/2021

Section	Changes
General	The SPI, I²S, and I²C standards use the terminology "Master" and "Slave". The equivalent Microchip terminology used in this document is "Host" and "Client" respectively. These terms have been updated throughout this document for this revision. This revision contains numerous typographical updates, and formatting updates. Large sections of this data sheet were rewritten to conform to updated standards. Updated the Product Identification System to remove an erroneous table.
Pinout	Updated the UFBGA100 Pinout by replacing VSW0 with VDDOUT
Power Supply and Startup Considerations	Updated numerous cross references to point to the correct chapters or sections Added notes to the figures in Typical Powering Schematic
Memories	Updated numerous cross references to point to the correct chapters or sections Updated the table in NVM Software Calibration Area Mapping
PAC	Updated numerous cross references to point to the correct chapters or sections
DSU	Updated numerous cross references to point to the correct chapters or sections
Clock System	Updated numerous cross references to point to the correct chapters or sections Updated the 14.1 Clock Distribution converting DPLL to FDPLL
GCLK	Updated numerous cross references to point to the correct chapters or sections Updated the PCHCTRLM Register with new information for bitfield output
MCLK	Updated numerous cross references to point to the correct chapters or sections Updated the following registers with new reset values or bitfield information: INTFLAG CPUDIV APBAMASK APBCMASK
FREQM	Updated numerous cross references to point to the correct chapters or sections
RSTC	Updated numerous cross references to point to the correct chapters or sections
PM	Updated numerous cross references to point to the correct chapters or sections Updated the reset value for the SLEEPCFG register
OSCCTRL	Updated numerous cross references to point to the correct chapters or sections Updated Features with missing information regarding Clock Failure Detection
OSC32KCTRL	Updated numerous cross references to point to the correct chapters or sections
SUPC	Updated numerous cross references to point to the correct chapters or sections Updated Sleep Mode Operation with new text and links Updated the following registers with new reset values: INTFLAG STATUS
WDT	Updated numerous cross references to point to the correct chapters or sections Updated the following Registers: CTRLA CONFIG EWCTRL
RTC	Updated numerous cross references to point to the correct chapters or sections Added new line items to Features for Backup Registers and Tamper Detection Updated Events with new information for TAMPER Updated Interrupts with new information for TAMPEV Updated Sleep Mode Operation with a new paragraph Updated the following Registers with proper naming conventions or new notes: COUNT32 Mode COUNT COUNT32 Mode GPn COUNT32 Mode BKUPn COUNT16 Mode COMPn COUNT16 Mode BKUPn COUNT16 Mode GPn Clock mode BKUPn Clock mode GPn
DMAC	Updated numerous cross references to point to the correct chapters or sections Updated the following Registers: DSTADDR SRCADDR
EIC	Updated numerous cross references to point to the correct chapters or sections Updated the CONFIGn register with a naming correction
NVMCTRL	Updated numerous cross references to point to the correct chapters or sections Updated the Block Diagram with a new image The following Registers had updates to the Register reset values, minor textual updates, or reset values for the bitfields within: CTRLB PARAM STATUS LOCK
PORT	Updated numerous cross references to point to the correct chapters or sections Updated the Functional Description with a new diagram for Overview of the PORT, and added a new note The following registers were updated with new naming: PMUXn PINCFGn The following registers were updated with new notes: DIR DIRCLR DIRSET DIRTGL OUT OUTCLR OUTSET OUTTGL IN CTRL WRCONFIG EVCTRL PMUXn PINCFGn
EVSYS	Updated numerous cross references to point to the correct chapters or sections
SERCOM	Updated numerous cross references to point to the correct chapters or sections
SERCOM SPI	Updated numerous cross references to point to the correct chapters or sections
SERCOM I²C	Updated numerous cross references to point to the correct chapters or sections Updated the bitfield accesses in the following registers: CTRLB
TCC	Updated the text in Double Buffering to better describe the PATT, PER and CCx Registers Updated TCCx to read TCC0 throughout the chapter Corrected non-functional cross references throughout the chapter Updated the naming of the CCBUFn Register
TRNG	Updated the bitfield access for the DATA register
AES	Updated the register naming in GCM Operation Updated the naming for the following registers: KEYWORDn INTVECTVn HASHKEYn GHASHn CIPLEN
CCL	Updated the Block Diagram Updated the Event Input Selection figure and the Linked LUT Input Selection figure in Truth Table Inputs Selection Updated the naming for the following registers: SEQCTRLn LUTCTRLn
ADC	Updated Interrupts with new text for the RESRDY and WINMON bitfields
AC	Updated VDD Scaler with new text Updated the VDD Scaler Diagram with new values for MUXPOS and MUXNEG
PTC	Added in Analog-to-Digital Converter section
Electrical Characteristics	Updated the Maximum Peripheral Clock Frequencies table with minor typographical corrections Updated the Active Current Consumption table in Power Consumption with a new Ta column Removed an erroneous equation from the Single-Ended Mode table in Analog-to-Digital (ADC) Characteristics
Schematic Checklist	Added Figure External Reset Circuti Schematic (EFT Immunity Enhancement) figure and a new note to External Reset Circuit

General

The SPI, I²S, and I²C standards use the terminology "Master" and "Slave". The equivalent Microchip terminology used in this document is "Host" and "Client" respectively. These terms have been updated throughout this document for this revision.
This revision contains numerous typographical updates, and formatting updates. Large sections of this data sheet were rewritten to conform to updated standards.
Updated the Product Identification System to remove an erroneous table.

Pinout

Updated the UFBGA100 Pinout by replacing VSW0 with VDDOUT

Power Supply and Startup Considerations

Updated numerous cross references to point to the correct chapters or sections
Added notes to the figures in Typical Powering Schematic

Memories

Updated numerous cross references to point to the correct chapters or sections
Updated the table in NVM Software Calibration Area Mapping

PAC

Updated numerous cross references to point to the correct chapters or sections

DSU

Updated numerous cross references to point to the correct chapters or sections

Clock System

Updated numerous cross references to point to the correct chapters or sections
Updated the 14.1 Clock Distribution converting DPLL to FDPLL

GCLK

Updated numerous cross references to point to the correct chapters or sections
Updated the PCHCTRLM Register with new information for bitfield output

MCLK

Updated numerous cross references to point to the correct chapters or sections
Updated the following registers with new reset values or bitfield information:
- INTFLAG
- CPUDIV
- APBAMASK
- APBCMASK

FREQM

Updated numerous cross references to point to the correct chapters or sections

RSTC

Updated numerous cross references to point to the correct chapters or sections

PM

Updated numerous cross references to point to the correct chapters or sections
Updated the reset value for the SLEEPCFG register

OSCCTRL

Updated numerous cross references to point to the correct chapters or sections
Updated Features with missing information regarding Clock Failure Detection

OSC32KCTRL

Updated numerous cross references to point to the correct chapters or sections

SUPC

Updated numerous cross references to point to the correct chapters or sections
Updated Sleep Mode Operation with new text and links
Updated the following registers with new reset values:
- INTFLAG
- STATUS

WDT

Updated numerous cross references to point to the correct chapters or sections
Updated the following Registers:
- CTRLA
- CONFIG
- EWCTRL

RTC

Updated numerous cross references to point to the correct chapters or sections
Added new line items to Features for Backup Registers and Tamper Detection
Updated Events with new information for TAMPER
Updated Interrupts with new information for TAMPEV
Updated Sleep Mode Operation with a new paragraph
Updated the following Registers with proper naming conventions or new notes:
- COUNT32 Mode COUNT
- COUNT32 Mode GPn
- COUNT32 Mode BKUPn
- COUNT16 Mode COMPn
- COUNT16 Mode BKUPn
- COUNT16 Mode GPn
- Clock mode BKUPn
- Clock mode GPn

DMAC

Updated numerous cross references to point to the correct chapters or sections
Updated the following Registers:
- DSTADDR
- SRCADDR

EIC

Updated numerous cross references to point to the correct chapters or sections
Updated the CONFIGn register with a naming correction

NVMCTRL

Updated numerous cross references to point to the correct chapters or sections
Updated the Block Diagram with a new image
The following Registers had updates to the Register reset values, minor textual updates, or reset values for the bitfields within:
- CTRLB
- PARAM
- STATUS
- LOCK

PORT

Updated numerous cross references to point to the correct chapters or sections
Updated the Functional Description with a new diagram for Overview of the PORT, and added a new note
The following registers were updated with new naming:
- PMUXn
- PINCFGn
The following registers were updated with new notes:
- DIR
- DIRCLR
- DIRSET
- DIRTGL
- OUT
- OUTCLR
- OUTSET
- OUTTGL
- IN
- CTRL
- WRCONFIG
- EVCTRL
- PMUXn
- PINCFGn

EVSYS

Updated numerous cross references to point to the correct chapters or sections

SERCOM

Updated numerous cross references to point to the correct chapters or sections

SERCOM SPI

Updated numerous cross references to point to the correct chapters or sections

SERCOM I²C

Updated numerous cross references to point to the correct chapters or sections
Updated the bitfield accesses in the following registers:
- CTRLB

TCC

Updated the text in Double Buffering to better describe the PATT, PER and CCx Registers
Updated TCCx to read TCC0 throughout the chapter
Corrected non-functional cross references throughout the chapter
Updated the naming of the CCBUFn Register

TRNG

Updated the bitfield access for the DATA register

AES

Updated the register naming in GCM Operation
Updated the naming for the following registers:
- KEYWORDn
- INTVECTVn
- HASHKEYn
- GHASHn
- CIPLEN

CCL

Updated the Block Diagram
Updated the Event Input Selection figure and the Linked LUT Input Selection figure in Truth Table Inputs Selection
Updated the naming for the following registers:
- SEQCTRLn
- LUTCTRLn

ADC

Updated Interrupts with new text for the RESRDY and WINMON bitfields

AC

Updated VDD Scaler with new text
Updated the VDD Scaler Diagram with new values for MUXPOS and MUXNEG

PTC

Added in Analog-to-Digital Converter section

Electrical Characteristics

Updated the Maximum Peripheral Clock Frequencies table with minor typographical corrections
Updated the Active Current Consumption table in Power Consumption with a new Ta column
Removed an erroneous equation from the Single-Ended Mode table in Analog-to-Digital (ADC) Characteristics

Schematic Checklist

Added Figure External Reset Circuti Schematic (EFT Immunity Enhancement) figure and a new note to External Reset Circuit