4.2.1 Packaging Decoupling Capacitors
(Ask a Question)The following table lists the packaging decoupling capacitors contained in the RTPF460T/ZT-CG1509 package. These are decoupling capacitors inside the package for different power lines. For board level decoupling capacitor requirements, see RT PolarFire SoC Board Design User Guide.
| Pin | Multi-Layer Ceramic Capacitor (MLCC) | Tantalum | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| 1 nF | 4.7 nF | 10 nF | 47 nF | 0.1 µF | 4.7 µF | 10 µF | 47 µF | 100 µF | 330 µF | |
| VDD | — | — | 10 | 4 | — | 7 | — | — | 1 | 3 |
| VDDA | 2 | 2 | 2 | — | — | 3 | — | — | 1 | — |
| VDD18 | — | — | — | — | — | 2 | — | — | 2 | — |
| VDD25 | — | — | — | — | — | 3 | — | — | 1 | — |
| VDDA25 | — | — | 1 | — | — | 4 | — | — | 1 | — |
| VDDI2 (MSSIO) | 1 | — | — | — | — | — | 1 | — | 1 | — |
| VDDI3 (JTAG) | — | — | — | — | — | — | 3 | — | — | — |
| VDDI4 (MSSIO) | 1 | — | — | — | — | — | 1 | — | 1 | — |
| VDDI5 (MSS SGMII) | 1 | — | — | — | — | — | 1 | — | 1 | — |
| VDDI6 (MSS DDR) | 1 | — | — | — | — | — | 2 | — | 1 | — |
| VDDAUX1 | — | — | 1 | — | — | — | 2 | — | 1 | — |
| VDDAUX2 | — | — | 1 | — | — | — | 2 | — | 1 | — |
| VDDAUX4 | — | — | 1 | — | — | — | 2 | — | 1 | — |
| VDDAUX7 | — | — | 1 | — | — | — | 2 | — | 1 | — |
| VDDAUX9 | — | — | 1 | — | — | — | 2 | — | 1 | — |
| VDDI1 (GPIO Bank) | 1 | — | — | — | — | — | 1 | — | 1 | — |
| VDDI7 (GPIO Bank) | 1 | — | — | — | — | — | 1 | — | 1 | — |
| VDDI9 (GPIO Bank) | 1 | — | — | — | — | — | 1 | — | 1 | — |
| VDDI0 (HSIO Bank) | 1 | 1 | — | — | — | 1 | — | — | 1 | — |
| VDDI8 (HSIO Bank) | 1 | 1 | — | — | — | 1 | — | — | 1 | — |
| VDD_XCVR_CLK | — | — | — | — | — | — | 3 | — | — | — |
| XCVR_VREF | — | — | — | — | — | — | 1 | — | — | — |
The following table lists the packaging decoupling capacitors contained in the RTPFS160T-FCV784 packages.
| Multi-Layer Ceramic Capacitor (MLCC) | Tantalum | |||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| Pin | 1 nF | 4.7 nF | 10 nF | 47 nF | 0.1 µF | 4.7 µF | 10 µF | 47 µF | 100 µF | 330 µF |
| VDD | — | — | 10 | 4 | — | 7 | — | — | 1 | 3 |
| VDD18 | — | — | — | — | — | 2 | — | — | 2 | — |
| VDD25 | — | — | — | — | — | 3 | — | — | 1 | — |
| VDDA | 2 | 2 | 2 | — | — | 3 | — | — | 1 | — |
| VDDA25 | 2 | — | 1 | — | — | 2 | — | — | 1 | — |
| VDDI2 (MSSIO) | 2 | — | — | — | — | — | — | — | 1 | — |
| VDDI3 (JTAG) | — | — | — | — | — | — | 3 | — | — | — |
| VDDI4 (MSSIO) | 2 | — | — | — | — | — | — | — | 1 | — |
| VDDI5 (MSS SGMII) | 2 | — | — | — | — | — | — | — | 1 | — |
| VDDI6 (MSS DDR) | 1 | — | — | — | — | — | 2 | — | 1 | — |
| VDDAUX1 | — | — | 1 | — | — | — | 2 | — | 1 | — |
| VDDAUX2 | — | — | 1 | — | — | — | 2 | — | 1 | — |
| VDDAUX4 | — | — | 1 | — | — | — | 2 | — | 1 | — |
| VDDAUX7 | — | — | 1 | — | — | — | 2 | — | 1 | — |
| VDDAUX9 | — | — | 1 | — | — | — | 2 | — | 1 | — |
| VDDI1 (GPIO Bank) | 1 | — | — | — | — | — | 1 | — | 1 | — |
| VDDI7 (GPIO Bank) | 1 | — | — | — | — | — | 1 | — | 1 | — |
| VDDI9 (GPIO Bank) | 1 | — | — | — | — | — | 1 | — | 1 | — |
| VDDI0 (HSIO Bank) | 1 | 1 | — | — | — | 1 | — | — | 1 | — |
| VDDI8 (HSIO Bank) | 1 | 1 | — | — | — | 1 | — | — | 1 | — |
| VDD_XCVR_CLK | — | — | — | — | — | — | 3 | — | — | — |
| XCVR_VREF | — | — | — | — | — | — | 1 | — | — | — |