30.8.14 Security Control
| Name: | SECCTRL |
| Offset: | 0x34 |
| Reset: | 'x' initially determined from NVM User Row after Reset |
| Property: | PAC Write-Protection, Secure |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| KEY[7:0] | |||||||||
| Access | W/-/W | W/-/W | W/-/W | W/-/W | W/-/W | W/-/W | W/-/W | W/-/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| TEROW[2:0] | |||||||||
| Access | RW/-/RW | RW/-/RW | RW/-/RW | ||||||
| Reset | 0 | 0 | 0 | ||||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DXN | DSCEN | SILACC | TAMPEEN | ||||||
| Access | R/-/R | RW/-/RW | RW/-/RW | RW/-/RW | |||||
| Reset | x | 0 | 0 | 0 |
Bits 31:24 – KEY[7:0] Write Key
When this bit group is written to the key value 0xA5, the write will be performed. If a value different from the key value is tried, the write will be discarded and INTFLAG.KEYE set.
Bits 10:8 – TEROW[2:0] Tamper Erase Row
Bit 6 – DXN Data eXecute Never
This bit status is loaded from UROW at boot.
| Value | Description |
|---|---|
| 0 | Execution out of Data Flash is authorized. |
| 1 | Execution out of Data Flash is not authorized. |
Bit 3 – DSCEN Data Scramble Enable
Important: This bitfield is
only available for SAM
L11 and has no
effect for SAM
L10.
| Value | Description |
|---|---|
| 0 | Secure Data FLASH is not scrambled. |
| 1 | Secure Data FLASH is scrambled. |
Bit 2 – SILACC Silent Access
| Value | Description |
|---|---|
| 0 | Data in Tamper Erase Row is not mapped as differential data. |
| 1 | Data in Tamper Erase Row is mapped as differential data. |
Bit 0 – TAMPEEN Tamper Erase Enable
| Value | Description |
|---|---|
| 0 | RTC tamper event has no effect. |
| 1 | RTC tamper event triggers a Tamper Erase. |