30.8.16 Secure Application and Data Configuration
This register is loaded from UROW at boot.
| Name: | SCFGAD |
| Offset: | 0x3C |
| Reset: | x initially determined from NVM User Row after reset |
| Property: | - |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| URWEN | |||||||||
| Access | R/-/R | ||||||||
| Reset | x |
Bit 0 – URWEN User Row Write Enable
| Value | Description |
|---|---|
| 0 | UROW is not writable. |
| 1 | UROW is writable. |