29.8.11 Debouncer Enable

Important: For SAM L11 Non-Secure accesses, read and write accesses (RW*) are allowed only if the external interrupt x (EXTINTx) is set as Non-Secure in the NONSEC register (NONSEC.EXTINTx bit). Some restrictions apply for the Non-Secure accesses to an Enable-Protected register as it will not be possible for the Non-Secure to configure it once this register is enabled by the Secure application. This will require some veneers to be implemented on Secure side.
Name: DEBOUNCEN
Offset: 0x30
Reset: 0x00000000
Property: PAC Write-Protection, Enable-Protected, Mix-Secure

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 DEBOUNCEN[7:0] 
Access RW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RW 
Reset 00000000 

Bits 7:0 – DEBOUNCEN[7:0] Debouncer Enable

The bit x of DEBOUNCEN set the Debounce mode for the interrupt associated with the EXTINTx pin.

ValueDescription
0 The EXTINT x edge input is not debounced.
1 The EXTINT x edge input is debounced.