29.8.10 External Interrupt Sense Configuration

Important: For SAM L11 Non-Secure accesses, read and write accesses (RW*) are allowed only if the external interrupt x (EXTINTx) is set as Non-Secure in the NONSEC register (NONSEC.EXTINTx bit). Some restrictions apply for the Non-Secure accesses to an Enable-Protected register as it will not be possible for the Non-Secure to configure it once this register is enabled by the Secure application. This will require some veneers to be implemented on the Secure side.
Name: CONFIG
Offset: 0x1C
Reset: 0x00000000
Property: PAC Write-Protection, Enable-Protected, Mix-Secure

Bit 3130292827262524 
 FILTEN7SENSE7[2:0]FILTEN6SENSE6[2:0] 
Access RW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RW 
Reset 00000000 
Bit 2322212019181716 
 FILTEN5SENSE5[2:0]FILTEN4SENSE4[2:0] 
Access RW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RW 
Reset 00000000 
Bit 15141312111098 
 FILTEN3SENSE3[2:0]FILTEN2SENSE2[2:0] 
Access RW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RW 
Reset 00000000 
Bit 76543210 
 FILTEN1SENSE1[2:0]FILTEN0SENSE0[2:0] 
Access RW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RW 
Reset 00000000 

Bits 3, 7, 11, 15, 19, 23, 27, 31 – FILTENx Filter Enable x [x=7..0]

ValueDescription
0 Filter is disabled for EXTINT[x] input.
1 Filter is enabled for EXTINT[x] input.

Bits 0:2, 4:6, 8:10, 12:14, 16:18, 20:22, 24:26, 28:30 – SENSEx Input Sense Configuration x [x=7..0]

These bits define on which edge or level the interrupt or event for EXTINT[x] will be generated.
ValueNameDescription
0x0 NONE No detection
0x1 RISE Rising-edge detection
0x2 FALL Falling-edge detection
0x3 BOTH Both-edge detection
0x4 HIGH High-level detection
0x5 LOW Low-level detection
0x6 - 0x7 - Reserved