29.8.8 Interrupt Flag Status and Clear

Important: For SAM L11 Non-Secure accesses, read and write accesses (RW*) are allowed only if the external interrupt x (EXTINTx) is set as Non-Secure in the NONSEC register (NONSEC.EXTINTx bit).
Name: INTFLAG
Offset: 0x14
Reset: 0x00000000
Property: Mix-Secure

Bit 3130292827262524 
 NSCHK        
Access RW/RW/RW 
Reset 0 
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 EXTINT[7:0] 
Access RW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RWRW/RW*/RW 
Reset 00000000 

Bit 31 – NSCHK Non-secure Check Interrupt

The flag is cleared by writing a '1' to it. This flag is set when write to either NONSEC and NSCHK register and if the related bit of NSCHK is enabled and the related bit of NONSEC is zero.

Bits 7:0 – EXTINT[7:0] External Interrupt

The flag bit x is cleared by writing a '1' to it.

This flag is set when EXTINTx pin matches the external interrupt sense configuration and will generate an interrupt request if INTENCLR29.8.6 Interrupt Enable Clear.EXTINT[x] or INTENSET29.8.7 Interrupt Enable Set.EXTINT[x] is '1'.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit clears the External Interrupt x flag.