31.8.4 Interrupt Flag Status and Clear
| Name: | INTFLAG |
| Offset: | 0x006 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DRP | ERR | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 |
Bit 1 – DRP Data Remanence Prevention Complete Interrupt
This flag is set when the data remanence prevention routine has completed, and an interrupt request will be generated if INTENCLR.DRP/INTENSET.DRP is one.
Writing a zero to this bit has no effect.
Writing a one to this bit clears the data remanence prevention complete interrupt flag.
| Value | Description |
|---|---|
| 0 | Data remanence prevention complete interrupt is disabled. |
| 1 | Data remanence prevention complete interrupt is enabled. |
Bit 0 – ERR TrustRAM Read Error Interrupt
This flag is set when an error is detected in the TrustRAM readout, and an interrupt request will be generated if INTENCLR.ERR/INTENSET.ERR is one.
Writing a zero to this bit has no effect.
Writing a one to this bit clears the TrustRAM read error interrupt flag.
| Value | Description |
|---|---|
| 0 | TrustRAM read error interrupt is disabled. |
| 1 | TrustRAM read error interrupt is enabled. |