21.3.8 SMTxCLK

SMT Clock Selection Register

Name: SMTxCLK
Address: 0x49B,0x51B

Bit 76543210 
      CSEL[2:0] 
Access R/WR/WR/W 
Reset 000 

Bits 2:0 – CSEL[2:0] SMT Clock Selection bits

Table 21-1. SMT Clock Source Selection
CSEL<2:0>Clock Source
111CLKREF output
110SOSC
101MFINTOSC (31.25kHz)
100MFINTOSC (500kHz)
011LFINTOSC
010HFINTOSC
001FOSC
000FOSC/4