6.4.4 NVMREG Erase of Program Memory

Before writing to program memory, the word(s) to be written must be erased or previously unwritten. Program memory can only be erased one row at a time. No automatic erase occurs upon the initiation of the write to program memory. To erase a program memory row:
  1. Clear the NVMREGS bit of the NVMCON1 register to erase program memory locations, or set the NMVREGS bit to erase User ID locations.
  2. Write the desired address into the NVMADRH:NVMADRL register pair.
  3. Set the FREE and WREN bits of the NVMCON1 register.
  4. Perform the unlock sequence as described in the “NVM Unlock Sequence” section.

If the program memory address is write-protected, the WR bit will be cleared and the erase operation will not take place.

While erasing program memory, CPU operation is suspended, and resumes when the operation is complete. Upon completion, the NVMIF is set, and an interrupt will occur if the NVMIE bit is also set.

Write latch data is not affected by erase operations, and WREN will remain unchanged.

Figure 6-3. NVM Erase Flowchart
Note: See the previous figure.

Erasing One Row of Program Flash Memory

   ; This sample row erase routine assumes the following:
   ; 1.A valid address within the erase row is loaded 
   ; in variables ADDRH:ADDRL
   ; 2.ADDRH and ADDRL are located in common RAM 
   ; (locations 0x70 - 0x7F)

    BANKSEL    NVMADRL
    MOVF       ADDRL,W           ; Load lower 8 bits of
    MOVWF      NVMADRL           ; erase address boundary
    MOVF       ADDRH,W           ; Load upper 6 bits
    MOVWF      NVMADRH           ; of erase address boundary
    BCF        NVMCON1,NVMREGS   ; Choose PFM memory area
    BSF        NVMCON1,FREE      ; Specify an erase operation
    BSF        NVMCON1,WREN      ; Enable writes
    BCF        INTCON,GIE        ; Disable interrupts during 
                                 ; unlock sequence

    ; ------------------REQUIRED UNLOCK SEQUENCE:-----------------
    MOVLW       0x55              ; Load 0x55 to get ready for 
                                  ; unlock sequence
    MOVWF       NVMCON2           ; First step, load 0x55 into NVMCON2
    MOVLW       0xAA              ; Second step, load 0xAA into W
    MOVWF       NVMCON2           ; Third step, load 0xAA into NVMCON2
    BSF         NVMCON1,WR        ; Final step, set WR bit
	
    ; -------------------ERASE IS COMPLETE----------------------
    BSF         INTCON,GIE        ; Re-enable interrupts
    BCF         NVMCON1,WREN      ; Disable writes
Table 6-1. NVM Organization and Access Information
Host Values NVMREG Access FSR Access
Memory Function Memory Type Program Counter (PC) ICSP™ Address NVMREGS bit (NVMCON1) NVMADR[14:0] Allowed Operations FSR Address FSR Programming Access
RESET VECTOR Program Flash Memory 0x0000 0x0000 0 0x0000 READ/WRITE 0x8000 READ ONLY
USER MEMORY 0x0001 0x0001 0 0x0001 0x8001
0x0003 0x0003 0x0003 0x8003
INT VECTOR 0x0004 0x0004 0 0x0004 0x8004
USER MEMORY 0x0005 0x0005 0 0x0005 0x8005
0x7FFF(1) 0x7FFF(1) 0x7FFF(1) 0xFFFF
USER ID Program Flash Memory NO PC ACCESS 0x8000 1 0x0000 READ/WRITE NO ACCESS
0x8003 0x0003
Reserved — — — 0x0004 —
REV ID HC 0x8005 1 0x0005 READ
DEVICE ID 0x8006 1 0x0006
CONFIG1 FUSE 0x8007 1 0x0007 READ/WRITE
CONFIG2 0x8008 1 0x0008
CONFIG3 0x8009 1 0x0009
CONFIG4 0x800A 1 0x000A
CONFIG5 0x800B 1 0x000B
DIA and DCI PFM 0x8100 1 0x0100 READ
0x82FF 1 0x02FF
USER MEMORY EEPROM 0xF000 1 0x7000 READ/WRITE 0x7000 READ ONLY
0xF0FF 0x70FF 0x70FF
Note:
  1. The maximum Program Flash Memory address for the PIC16(L)F184XX family is 0x7FFF.