17.1.1 Data Selection

There are 64 signals available as inputs to the configurable logic. Four 64-input multiplexers are used to select the inputs to pass on to the next stage.

Data selection is through four multiplexers as indicated on the left side of the following diagram. Data inputs in the figure are identified by a generic numbered input name.

Figure 17-2. Input Data Selection and Gating
The CLCxSEL0, CLCxSEL1, CLCxSEL2, and CLCxSEL3 Data Input Source registers correlate the generic input name to the actual signal for each CLC module. The column labeled ‘DyS Value’ indicates the MUX selection code for the selected data input. DyS is an abbreviation for the MUX select input codes: D1S through D4S where ‘y’ is the gate number.
Important: Data selections are undefined at power-up.