3.1.18 Reactive Power Offset Register
The physical significance of POWER_OFFSET_Q is total reactive energy (VAR-hour) offset per full cycle (20 ms for 50 Hz, 16.667 ms for 60 Hz).
POWER_OFFSET_Q is stored in sQ1.30 format and is subtracted each full cycle.
POWER_OFFSET_Q affects only Q and Q_F pulse generation and ACC_Tx pulse accumulators.
Refer to “PIC32CXMTx Metrology User Guide” (DS50003460) for a more detailed description.
Name: | POWER_OFFSET_Q |
Property: | Read-Write |
This value indicates the reactive power offset of appointed pulse.
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
POWER_OFFSET_Q[31:24] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
POWER_OFFSET_Q[23:16] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
POWER_OFFSET_Q[15:8] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
POWER_OFFSET_Q[7:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |