3.1.32 ATSENSE ADC Control Register 2

This register is a consolidation of the ADC control bits for the ATSense AFE: configure registers.

Name: ATSENSE_CTRL_28_2B
Property: Read-Write

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
    MSB_MODE  OSR[1:0] 
Access R/WR/WR/W 
Reset 000 

Bit 4 – MSB_MODE Mode Selection (see ATSense register ATCFG, offset 0x28)

ValueDescription
0x0 32-bits mode
0x1 16-bits mode

Bits 1:0 – OSR[1:0] Over Sampling Ratio (see ATSense register ATCFG, offset 0x28)

ValueDescription
0x0 System OSR = 8
0x1 System OSR = 16
0x2 System OSR = 32
0x3 System OSR = 64