15.6.1 About ChipPlanner in MultiView Navigator

ChipPlanner is the floorplanning tool you use to create and edit regions on your chip and assign logic to these regions. You can also use it to view routing information and influence place-and-route for more optimal results. This tool is particularly useful when you need maximum control over your design placement.

Note: ChipPlanner supports only the IGLOO, Fusion, ProASIC3, ProASIC Plus, ProASIC, Axcelerator, SX-A, and eX families. If you are designing for other families, use ChipEditor. For more information, see the ChipEditor online help or the ChipEditor User's Guide .

Use ChipPlanner to:

  • View macro assignments made during layout
  • Assign, unassign, or move macros
  • Lock macro assignments
  • View net connections using a ratsnest or route view
  • View architectural boundaries
  • View and edit silicon features, such as I/O banks
  • Create Regions and assign macros or nets to regions (floorplanning)
  • View placement and routing of paths when used with SmartTime