13.32.2.2 Sample Tcl Script

#Set up a new design

new_design -name "multiclk" -family "Axcelerator" -path {.}

# Set device, package, speed grade, default I/O standard and # operating conditions

set_device -die "AX1000" -package "BG729" -speed "-3" \

-voltage "1.5" -iostd "LVTTL" -temprange "COM" -voltrange "COM"

# Import the netlist

import -format "verilog" {multiclk.v}

# Compile the netlist compile

# Import a PDC file

import_aux -format "pdc" {multiclk.pdc}

# Run standard layout layout -incremental "OFF"

# Generate backannotated sdf and netlist file

backannotate -name {multiclk_ba} -format "sdf" -language "Verilog"

# Generate timing report

report -type "timing" -sortby "actual" -maxpaths "100" {report_timing.txt} # Generate programming file

export -format "AFM" -signature "ffff" {multiclk.afm}