15.15.7 More I/O Bank Attributes Dialog Box
To access this dialog, from the Edit menu, choose I/O Bank Settings, and then click More Attributes.
Use this dialog box to configure these low-power mode settings:
- Enable/disable input/output buffers
- Input delay for a bank
Although designed for high performance, the Axcelerator architecture also allows you to place the device into a low-power (LP) mode via a dedicated LP pin. Asserting the LP pin, which is grounded in normal operation, activates LP mode on all the I/O banks. When LP mode is activated, I/O banks are disabled (inputs disabled, outputs tristated), and PLLs are placed in a power-down mode. All internal register states are maintained in this mode. Furthermore, you can configure individual I/O banks to opt out of the LP mode, giving you access to critical signals while the rest of the chip is in LP mode.
Using the following options in the More Attributes dialog box, you can individually configure each I/O bank in an Axcelerator device when in low-power mode:
